Usually, ECC memory maintains a memory system immune to single-bit errors: Memory Wave Audio the data that is read from each word is at all times the identical as the information that had been written to it, even when one of the bits truly saved has been flipped to the incorrect state. Most non-ECC memory cannot detect errors, although some non-ECC memory with parity support allows detection but not correction. ECC memory is utilized in most computer systems where data corruption cannot be tolerated, like industrial management purposes, vital databases, and infrastructural Memory Wave Audio caches. Error correction codes protect against undetected knowledge corruption and are utilized in computers the place such corruption is unacceptable, examples being scientific and monetary computing applications, or in database and file servers. ECC may cut back the variety of crashes in multi-user server functions and Memory Wave maximum-availability methods. Electrical or magnetic interference inside a pc system can cause a single bit of dynamic random-entry memory (DRAM) to spontaneously flip to the other state.

It was initially thought that this was mainly resulting from alpha particles emitted by contaminants in chip packaging material, but analysis has shown that the majority of 1-off smooth errors in DRAM chips happen because of background radiation, chiefly neutrons from cosmic ray secondaries, which may change the contents of one or more memory cells or interfere with the circuitry used to learn or write to them. Therefore, the error charges increase quickly with rising altitude; for instance, compared to sea level, the speed of neutron flux is 3.5 times increased at 1.5 km and 300 occasions greater at 10-12 km (the cruising altitude of commercial airplanes). Consequently, methods operating at excessive altitudes require special provisions for reliability. As an example, the spacecraft Cassini-Huygens, launched in 1997, contained two identical flight recorders, every with 2.5 gigabits of memory in the form of arrays of business DRAM chips. Attributable to built-in EDAC functionality, the spacecraft's engineering telemetry reported the number of (correctable) single-bit-per-phrase errors and (uncorrectable) double-bit-per-phrase errors.

During the first 2.5 years of flight, the spacecraft reported a almost fixed single-bit error rate of about 280 errors per day. However, on November 6, 1997, throughout the primary month in house, the number of errors elevated by more than an element of 4 on that single day. There was some concern that as DRAM density increases additional, and thus the components on chips get smaller, whereas working voltages continue to fall, DRAM chips will probably be affected by such radiation extra incessantly, since decrease-power particles will likely be in a position to alter a memory cell's state. However, smaller cells make smaller targets, and moves to applied sciences resembling SOI might make particular person cells much less prone and so counteract, and even reverse, this pattern. Work published between 2007 and 2009 showed extensively varying error rates with over 7 orders of magnitude difference, ranging from 10−10 error/(bit·h), roughly one bit error per hour per gigabyte of memory, to 10−17 error/(bit·h), roughly one bit error per millennium per gigabyte of memory.

A big-scale examine based on Google's very giant variety of servers was introduced at the SIGMETRICS/Efficiency '09 conference. The precise error rate found was several orders of magnitude higher than the previous small-scale or laboratory research, with between 25,000 (2.5×10−11 error/(bit·h)) and 70,000 (7.0×10−11 error/(bit·h), or 1 bit error per gigabyte of RAM per 1.8 hours) errors per billion device hours per megabit. More than 8% of DIMM memory modules were affected by errors per year. The consequence of a memory error is system-dependent. In methods with out ECC, an error can lead both to a crash or to corruption of data; in giant-scale manufacturing websites, memory errors are some of the-frequent hardware causes of machine crashes. Memory errors could cause security vulnerabilities. A Memory Wave error can have no consequences if it changes a bit which neither causes observable malfunctioning nor affects data utilized in calculations or saved. A 2010 simulation research showed that, for a web browser, only a small fraction of memory errors triggered knowledge corruption, although, as many memory errors are intermittent and correlated, the consequences of memory errors were better than would be anticipated for independent tender errors.